Associate Professor Mojtaba Valinataj
College: Electrical & Computer Engineering
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Department: Computer
Articles
| # | Paper Title | Authors | Publication/Conference | Date | Type |
|---|---|---|---|---|---|
| 21 | Novel low-cost and fault-tolerant reversible logic adders | Mojtaba Valinataj, , Hamid Jazayeri | COMPUTERS and ELECTRICAL ENGINEERING | 2016 | Article In Publication |
| 22 | A Reliable and High-Performance Network-on-Chip Router Through Decoupled Resource Sharing | Mostafa Shahiri Tabarestani, Mojtaba Valinataj, Amir M. Rahmani | International Conference on High Performance Computing Simulation (HPCS 2016) | 2016 | Article In Conference |
| 23 | Fault-tolerant carry look-ahead adder architectures robust to multiple simultaneous errors | Mojtaba Valinataj | MICROELECTRONICS RELIABILITY | 2015 | Article In Publication |
| 24 | A Multi-Start Path-Relinking Algorithm For The Flexible Job-Shop Scheduling Problem | Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj | The Seventh International Conference on Information and Knowledge Technology | 2015 | Article In Conference |
| 25 | A novel self-checking carry lookahead adder with multiple error detection/correction | Mojtaba Valinataj | MICROPROCESSORS AND MICROSYSTEMS | 2014 | Article In Publication |
| 26 | Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures | Mojtaba Valinataj | International Journal of Engineering, Transactions A: Basics | 2014 | Article In Publication |
| 27 | Enhanced Fault-Tolerant Network-on-Chip Architecture Using Hierarchical Agents | Mojtaba Valinataj, Pasi Liljeberg, Juha Plosila | 16th IEEE Intl. Symp. on Design and Diagnostics of Electronic Circuits and Systems (DDECS) | 2013 | Article In Conference |
| 28 | Reliable On-Chip Network Design Using an Agent-based Management Method | Mojtaba Valinataj, Pasi Liljeberg, Juha Plosila | 19th Intl. Conf. on Mixed Design of Integrated Circuits and Systems (MIXDES) | 2012 | Article In Conference |
| 29 | Evaluation of Fault-Tolerant Routing Methods for NoC Architectures | Mojtaba Valinataj | 14th EUROMICRO Conf. on Digital System Design Architectures Methods and Tools (DSD) | 2011 | Article In Conference |
| 30 | A Fault-Tolerant and Hierarchical Routing Algorithm for NoC Architectures | Mojtaba Valinataj, Pasi Liljeberg, Juha Plosila | 29th NORCHIP Conference | 2011 | Article In Conference |
| 31 | A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip | Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS | 2011 | Article In Publication |
| 32 | A Fault-Tolerant and Congestion Aware Routing Algorithm for Networks-on-Chip | Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg | 13th IEEE Intl. Symp. on Design and Diagnostics of Electronic Circuits and Systems (DDECS) | 2010 | Article In Conference |
| 33 | A Fault Aware Reconfigurable and Adaptive Routing Algorithm for NoC Applications | Mojtaba Valinataj, Siamak Mohammadi | IEEE/IFIP Intl. Conf. on VLSI and System-on-Chip (VLSI-SoC) | 2010 | Article In Conference |
| 34 | A Link Failure Aware Routing Algorithm for Networks-on-Chip in Nano Technologies | Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari, Juha Plosila | 9th IEEE Conference on Nanotechnology (IEEE-NANO) | 2009 | Article In Conference |
| 35 | Inherent Reliability Evaluation of Networks-on-Chip Based on Analytical Models | Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari | 10th International Symposium on System-on-Chip | 2008 | Article In Conference |
| 36 | Fault Tolerant Arithmetic Operations with Multiple Error Detection and Correction | Mojtaba Valinataj, Saeed Safari | 22th IEEE Intl. Symp. on Defect and Fault-Tolerance in VLSI Systems (DFT) | 2007 | Article In Conference |
Showing 21-36 of 36 items.