Associate Professor Mojtaba Valinataj
College: Electrical & Computer Engineering
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Department: Computer
Papers in Conferences
| # | Paper Title | Authors | Conference Title | Holding Date of Conference |
|---|---|---|---|---|
| 1 | Improving a Deep Neural Network Accelerator using FPGA for Diagnosing Malaria Diseased Blood Cells | Hadi Rezaei karjani, Mojtaba Valinataj | 14th International Conference on Information and Knowledge Technology (IKT) | 2023 |
| 2 | Operational conditions analysis for memristive stateful logics - A Study on IMPLY and TMSL | Roya Rahimi Disfani, Nima Taherinejad, Mojtaba Valinataj | 20th IEEE Interregional NEWCAS Conference | 2022 |
| 3 | Reliability Improvement of Fault-Tolerant Shuffle Exchange Interconnection Networks | Roya Gholizadeh, Mojtaba Valinataj | 10th International conference on Computer and Knowledge Engineering | 2020 |
| 4 | A Novel Area-Delay Efficient Carry Select Adder Based on New Add-one Circuit | Maytham Allahi roodpoushti, Mojtaba Valinataj | 9th International conference on Computer and Knowledge Engineering | 2019 |
| 5 | Low-Cost Reversible Logic Serial Multipliers with Error Detection Capability | Mojtaba Valinataj | 19th Intl. Conf. on Electronics, Computer and Communication Engineering (ICECCE) | 2017 |
| 6 | A Reliable and High-Performance Network-on-Chip Router Through Decoupled Resource Sharing | Mostafa Shahiri Tabarestani, Mojtaba Valinataj, Amir M. Rahmani | International Conference on High Performance Computing Simulation (HPCS 2016) | 2016 |
| 7 | A Multi-Start Path-Relinking Algorithm For The Flexible Job-Shop Scheduling Problem | Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj | The Seventh International Conference on Information and Knowledge Technology | 2015 |
| 8 | Enhanced Fault-Tolerant Network-on-Chip Architecture Using Hierarchical Agents | Mojtaba Valinataj, Pasi Liljeberg, Juha Plosila | 16th IEEE Intl. Symp. on Design and Diagnostics of Electronic Circuits and Systems (DDECS) | 2013 |
| 9 | Reliable On-Chip Network Design Using an Agent-based Management Method | Mojtaba Valinataj, Pasi Liljeberg, Juha Plosila | 19th Intl. Conf. on Mixed Design of Integrated Circuits and Systems (MIXDES) | 2012 |
| 10 | A Fault-Tolerant and Hierarchical Routing Algorithm for NoC Architectures | Mojtaba Valinataj, Pasi Liljeberg, Juha Plosila | 29th NORCHIP Conference | 2011 |
| 11 | Evaluation of Fault-Tolerant Routing Methods for NoC Architectures | Mojtaba Valinataj | 14th EUROMICRO Conf. on Digital System Design Architectures Methods and Tools (DSD) | 2011 |
| 12 | A Fault Aware Reconfigurable and Adaptive Routing Algorithm for NoC Applications | Mojtaba Valinataj, Siamak Mohammadi | IEEE/IFIP Intl. Conf. on VLSI and System-on-Chip (VLSI-SoC) | 2010 |
| 13 | A Fault-Tolerant and Congestion Aware Routing Algorithm for Networks-on-Chip | Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg | 13th IEEE Intl. Symp. on Design and Diagnostics of Electronic Circuits and Systems (DDECS) | 2010 |
| 14 | A Link Failure Aware Routing Algorithm for Networks-on-Chip in Nano Technologies | Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari, Juha Plosila | 9th IEEE Conference on Nanotechnology (IEEE-NANO) | 2009 |
| 15 | Inherent Reliability Evaluation of Networks-on-Chip Based on Analytical Models | Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari | 10th International Symposium on System-on-Chip | 2008 |
| 16 | Fault Tolerant Arithmetic Operations with Multiple Error Detection and Correction | Mojtaba Valinataj, Saeed Safari | 22th IEEE Intl. Symp. on Defect and Fault-Tolerance in VLSI Systems (DFT) | 2007 |
Showing 1-16 of 16 items.