faculty389001en

activity_title	activity_desc	startedAt	endedAt
Arithmetic Processors		(not set)	(not set)
Computer Architecture Lab		(not set)	(not set)

activity_title	startedAt	endedAt
Some Analysis and Comments on "Novel low-cost and fault-tolerant reversible logic adders"	01 January 2016	(not set)
A New Design of Fault Tolerant Conditional Sum Adder With Dynamic Recovery	01 January 2016	(not set)
Design and FPGA Performance Analysis of 2D and 3D Router in Mesh NoC	01 January 2017	(not set)
Efficient Low-Cost Fault-Localization and Self-Repairing Radix-2 Signed-Digit Adders Applying the Self-Dual Concept	01 January 2016	(not set)
Journal on Emerging Technologies in Computing Systems	01 January 2017	(not set)
Sustainable Computing Informatics and Systems	01 January 2018	(not set)
RNS-based Radix-16 Booth Encoded Multiplier for Modulo Set	01 January 2018	(not set)
Load Balancing Approaches for Web Servers: A Survey of Recent Trends	01 January 2017	(not set)
High Speed, Low Power Approximate Convolution Circuit	01 January 2017	(not set)
Arabian Journal for Science and Engineering	01 January 2018	(not set)
AJSE-Design of Fault Tolerant Adders: A Review-AJSE-D-18-01512R1	01 January 2018	(not set)
AJSE-Design of Fault Tolerant Adders: A Review-AJSE-D-18-01512R2	01 January 2018	(not set)
ETRI Journal-etrij-2018-0170	01 January 2018	(not set)
SUPE-D-18-01009	01 January 2018	(not set)
Sustainable Computing Informatics and Systems-SUSCOM_2017_405	01 January 2018	(not set)
International Journal of Engineering paper no IJE-2002-2288	01 January 2020	(not set)
Journal on Emerging Technologies in Computing Systems paper JETC-2019-0101.R1	01 January 2020	(not set)
Journal on Emerging Technologies in Computing Systems paper JETC-2019-0101	01 January 2019	(not set)
Microelectronics Journal paper MEJ_2019_501	01 January 2019	(not set)
Microelectronics Journal paper MEJ_D20_00095	01 January 2020	(not set)

Papers in Journals

1. Roya Rahimi Disfani, Mojtaba Valinataj, Nima TaheriNejad،High-Speed and Low-Cost In-Array Memristive Multipliers using SIXOR and TMSL Logics،IEEE TRANSACTIONS ON NANOTECHNOLOGY،2025.
2. Roya Rahimi Disfani, Mojtaba Valinataj, Nima TaheriNejad،High-Speed and Low-Cost In-Array Memristive Multipliers using SIXOR and TMSL Logics،IEEE TRANSACTIONS ON NANOTECHNOLOGY،2025.
3. Roya Rahimi Disfani, Mojtaba Valinataj, Nima TaheriNejad،High-Speed and Low-Cost In-Array Memristive Multipliers using SIXOR and TMSL Logics،IEEE TRANSACTIONS ON NANOTECHNOLOGY،2025.
4. Roya Rahimi Disfani, Mojtaba Valinataj, Nima TaheriNejad،High-Speed and Low-Cost In-Array Memristive Multipliers using SIXOR and TMSL Logics،IEEE TRANSACTIONS ON NANOTECHNOLOGY،2025.
5. Roya Rahimi Disfani, Mojtaba Valinataj, Nima TaheriNejad،High-Speed and Low-Cost In-Array Memristive Multipliers using SIXOR and TMSL Logics،IEEE TRANSACTIONS ON NANOTECHNOLOGY،2025.
6. Roya Rahimi Disfani, Mojtaba Valinataj, Nima TaheriNejad،High-Speed and Low-Cost In-Array Memristive Multipliers using SIXOR and TMSL Logics،IEEE TRANSACTIONS ON NANOTECHNOLOGY،2025.
7. Zahra Yazdanian amiri, Mojtaba Valinataj،High-speed binary coded decimal digit multipliers with multiple error detection،INTEGRATION-THE VLSI JOURNAL،2023.
8. Zahra Yazdanian amiri, Mojtaba Valinataj،High-speed binary coded decimal digit multipliers with multiple error detection،INTEGRATION-THE VLSI JOURNAL،2023.
9. Zahra Yazdanian amiri, Mojtaba Valinataj،High-speed binary coded decimal digit multipliers with multiple error detection،INTEGRATION-THE VLSI JOURNAL،2023.
10. Zahra Yazdanian amiri, Mojtaba Valinataj،High-speed binary coded decimal digit multipliers with multiple error detection،INTEGRATION-THE VLSI JOURNAL،2023.
11. Zahra Yazdanian amiri, Mojtaba Valinataj،High-speed binary coded decimal digit multipliers with multiple error detection،INTEGRATION-THE VLSI JOURNAL،2023.
12. Zahra Yazdanian amiri, Mojtaba Valinataj،High-speed binary coded decimal digit multipliers with multiple error detection،INTEGRATION-THE VLSI JOURNAL،2023.
13. Mojtaba Valinataj, Axel Jantsch،Hierarchical multipliers: A framework for high-speed multiple error detecting architectures،MICROELECTRONICS JOURNAL،2022.
14. Mojtaba Valinataj, Axel Jantsch،Hierarchical multipliers: A framework for high-speed multiple error detecting architectures،MICROELECTRONICS JOURNAL،2022.
15. Mojtaba Valinataj, Axel Jantsch،Hierarchical multipliers: A framework for high-speed multiple error detecting architectures،MICROELECTRONICS JOURNAL،2022.
16. Mojtaba Valinataj, Axel Jantsch،Hierarchical multipliers: A framework for high-speed multiple error detecting architectures،MICROELECTRONICS JOURNAL،2022.
17. Mojtaba Valinataj, Axel Jantsch،Hierarchical multipliers: A framework for high-speed multiple error detecting architectures،MICROELECTRONICS JOURNAL،2022.
18. Mojtaba Valinataj, Axel Jantsch،Hierarchical multipliers: A framework for high-speed multiple error detecting architectures،MICROELECTRONICS JOURNAL،2022.
19. Maytham Allahi roodpoushti, Mojtaba Valinataj،High-speed and low-cost carry select adders utilizing new optimized add-one circuit and multiplexer-based logic،INTEGRATION-THE VLSI JOURNAL،2021.
20. Mojtaba Valinataj, Zahra Yazdanian amiri،Comments on "Improved designs of digit-by-digit decimal multiplier"،INTEGRATION-THE VLSI JOURNAL،2021.
21. Mojtaba Valinataj،An Enhanced Self-checking Carry Select Adder Utilizing the Concept of Self-checking Full Adder،International Journal of Engineering،2021.
22. Maytham Allahi roodpoushti, Mojtaba Valinataj،High-speed and low-cost carry select adders utilizing new optimized add-one circuit and multiplexer-based logic،INTEGRATION-THE VLSI JOURNAL،2021.
23. Mojtaba Valinataj, Zahra Yazdanian amiri،Comments on "Improved designs of digit-by-digit decimal multiplier"،INTEGRATION-THE VLSI JOURNAL،2021.
24. Mojtaba Valinataj،An Enhanced Self-checking Carry Select Adder Utilizing the Concept of Self-checking Full Adder،International Journal of Engineering،2021.
25. Maytham Allahi roodpoushti, Mojtaba Valinataj،High-speed and low-cost carry select adders utilizing new optimized add-one circuit and multiplexer-based logic،INTEGRATION-THE VLSI JOURNAL،2021.
26. Mojtaba Valinataj, Zahra Yazdanian amiri،Comments on "Improved designs of digit-by-digit decimal multiplier"،INTEGRATION-THE VLSI JOURNAL،2021.
27. Mojtaba Valinataj،An Enhanced Self-checking Carry Select Adder Utilizing the Concept of Self-checking Full Adder،International Journal of Engineering،2021.
28. Maytham Allahi roodpoushti, Mojtaba Valinataj،High-speed and low-cost carry select adders utilizing new optimized add-one circuit and multiplexer-based logic،INTEGRATION-THE VLSI JOURNAL،2021.
29. Mojtaba Valinataj, Zahra Yazdanian amiri،Comments on "Improved designs of digit-by-digit decimal multiplier"،INTEGRATION-THE VLSI JOURNAL،2021.
30. Mojtaba Valinataj،An Enhanced Self-checking Carry Select Adder Utilizing the Concept of Self-checking Full Adder،International Journal of Engineering،2021.
31. Maytham Allahi roodpoushti, Mojtaba Valinataj،High-speed and low-cost carry select adders utilizing new optimized add-one circuit and multiplexer-based logic،INTEGRATION-THE VLSI JOURNAL،2021.
32. Mojtaba Valinataj, Zahra Yazdanian amiri،Comments on "Improved designs of digit-by-digit decimal multiplier"،INTEGRATION-THE VLSI JOURNAL،2021.
33. Mojtaba Valinataj،An Enhanced Self-checking Carry Select Adder Utilizing the Concept of Self-checking Full Adder،International Journal of Engineering،2021.
34. Maytham Allahi roodpoushti, Mojtaba Valinataj،High-speed and low-cost carry select adders utilizing new optimized add-one circuit and multiplexer-based logic،INTEGRATION-THE VLSI JOURNAL،2021.
35. Mojtaba Valinataj, Zahra Yazdanian amiri،Comments on "Improved designs of digit-by-digit decimal multiplier"،INTEGRATION-THE VLSI JOURNAL،2021.
36. Mojtaba Valinataj،An Enhanced Self-checking Carry Select Adder Utilizing the Concept of Self-checking Full Adder،International Journal of Engineering،2021.
37. Sajjad Rostami Sani, Mojtaba Valinataj, Saeideh Alinezhad،Parloom: A New Low-Power Set-Associative Instruction Cache Architecture Utilizing Enhanced Counting Bloom Filter and Partial Tags،JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS،2019.
38. Mojtaba Valinataj،Enhanced multiple-error resilient carry look-ahead adders through new customized fault-tolerant voters،MICROELECTRONICS RELIABILITY،2019.
39. Farshid Eslami Chalandar, Mojtaba Valinataj, Hamid Jazayeri،Reversible Logic Multipliers: Novel Low-cost Parity-Preserving Designs،International Journal of Engineering،2019.
40. Sajjad Rostami Sani, Mojtaba Valinataj, Saeideh Alinezhad،Parloom: A New Low-Power Set-Associative Instruction Cache Architecture Utilizing Enhanced Counting Bloom Filter and Partial Tags،JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS،2019.
41. Mojtaba Valinataj،Enhanced multiple-error resilient carry look-ahead adders through new customized fault-tolerant voters،MICROELECTRONICS RELIABILITY،2019.
42. Farshid Eslami Chalandar, Mojtaba Valinataj, Hamid Jazayeri،Reversible Logic Multipliers: Novel Low-cost Parity-Preserving Designs،International Journal of Engineering،2019.
43. Sajjad Rostami Sani, Mojtaba Valinataj, Saeideh Alinezhad،Parloom: A New Low-Power Set-Associative Instruction Cache Architecture Utilizing Enhanced Counting Bloom Filter and Partial Tags،JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS،2019.
44. Mojtaba Valinataj،Enhanced multiple-error resilient carry look-ahead adders through new customized fault-tolerant voters،MICROELECTRONICS RELIABILITY،2019.
45. Farshid Eslami Chalandar, Mojtaba Valinataj, Hamid Jazayeri،Reversible Logic Multipliers: Novel Low-cost Parity-Preserving Designs،International Journal of Engineering،2019.
46. Sajjad Rostami Sani, Mojtaba Valinataj, Saeideh Alinezhad،Parloom: A New Low-Power Set-Associative Instruction Cache Architecture Utilizing Enhanced Counting Bloom Filter and Partial Tags،JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS،2019.
47. Mojtaba Valinataj،Enhanced multiple-error resilient carry look-ahead adders through new customized fault-tolerant voters،MICROELECTRONICS RELIABILITY،2019.
48. Farshid Eslami Chalandar, Mojtaba Valinataj, Hamid Jazayeri،Reversible Logic Multipliers: Novel Low-cost Parity-Preserving Designs،International Journal of Engineering،2019.
49. Sajjad Rostami Sani, Mojtaba Valinataj, Saeideh Alinezhad،Parloom: A New Low-Power Set-Associative Instruction Cache Architecture Utilizing Enhanced Counting Bloom Filter and Partial Tags،JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS،2019.
50. Mojtaba Valinataj،Enhanced multiple-error resilient carry look-ahead adders through new customized fault-tolerant voters،MICROELECTRONICS RELIABILITY،2019.
51. Farshid Eslami Chalandar, Mojtaba Valinataj, Hamid Jazayeri،Reversible Logic Multipliers: Novel Low-cost Parity-Preserving Designs،International Journal of Engineering،2019.
52. Sajjad Rostami Sani, Mojtaba Valinataj, Saeideh Alinezhad،Parloom: A New Low-Power Set-Associative Instruction Cache Architecture Utilizing Enhanced Counting Bloom Filter and Partial Tags،JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS،2019.
53. Mojtaba Valinataj،Enhanced multiple-error resilient carry look-ahead adders through new customized fault-tolerant voters،MICROELECTRONICS RELIABILITY،2019.
54. Farshid Eslami Chalandar, Mojtaba Valinataj, Hamid Jazayeri،Reversible Logic Multipliers: Novel Low-cost Parity-Preserving Designs،International Journal of Engineering،2019.
55. Mojtaba Valinataj, Abbas Mohammadnezhad, Jari Nurmi،A low-cost high-speed self-checking carry select adder with multiple-fault detection،MICROELECTRONICS JOURNAL،2018.
56. Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj،aPaRT A Fast Meta-Heuristic Algorithm using Path-Relinking and Tabu Search for Allocating Machines to Operations in FJSP Problem،Inteligencia Artificial،2018.
57. Mojtaba Valinataj, Abbas Mohammadnezhad, Jari Nurmi،A low-cost high-speed self-checking carry select adder with multiple-fault detection،MICROELECTRONICS JOURNAL،2018.
58. Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj،aPaRT A Fast Meta-Heuristic Algorithm using Path-Relinking and Tabu Search for Allocating Machines to Operations in FJSP Problem،Inteligencia Artificial،2018.
59. Mojtaba Valinataj, Abbas Mohammadnezhad, Jari Nurmi،A low-cost high-speed self-checking carry select adder with multiple-fault detection،MICROELECTRONICS JOURNAL،2018.
60. Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj،aPaRT A Fast Meta-Heuristic Algorithm using Path-Relinking and Tabu Search for Allocating Machines to Operations in FJSP Problem،Inteligencia Artificial،2018.
61. Mojtaba Valinataj, Abbas Mohammadnezhad, Jari Nurmi،A low-cost high-speed self-checking carry select adder with multiple-fault detection،MICROELECTRONICS JOURNAL،2018.
62. Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj،aPaRT A Fast Meta-Heuristic Algorithm using Path-Relinking and Tabu Search for Allocating Machines to Operations in FJSP Problem،Inteligencia Artificial،2018.
63. Mojtaba Valinataj, Abbas Mohammadnezhad, Jari Nurmi،A low-cost high-speed self-checking carry select adder with multiple-fault detection،MICROELECTRONICS JOURNAL،2018.
64. Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj،aPaRT A Fast Meta-Heuristic Algorithm using Path-Relinking and Tabu Search for Allocating Machines to Operations in FJSP Problem،Inteligencia Artificial،2018.
65. Mojtaba Valinataj, Abbas Mohammadnezhad, Jari Nurmi،A low-cost high-speed self-checking carry select adder with multiple-fault detection،MICROELECTRONICS JOURNAL،2018.
66. Sahar Bakhtar, Hamid Jazayeri, Mojtaba Valinataj،aPaRT A Fast Meta-Heuristic Algorithm using Path-Relinking and Tabu Search for Allocating Machines to Operations in FJSP Problem،Inteligencia Artificial،2018.
67. Mojtaba Valinataj،Novel parity-preserving reversible logic array multipliers،JOURNAL OF SUPERCOMPUTING،2017.
68. Majid Ghaffari, Ali A. Orouji, Mojtaba Valinataj،Triple tooth AlGaN/GaN HEMT on SiC substrate A novel structure for high-power applications،JOURNAL OF THE KOREAN PHYSICAL SOCIETY،2017.
69. Maryam Mohajer, Mojtaba Valinataj،A Novel Reduced-Precision Fault-Tolerant Floating-Point Multiplier،International Journal of Modern Education and Computer Science،2017.
70. Mojtaba Valinataj،Novel parity-preserving reversible logic array multipliers،JOURNAL OF SUPERCOMPUTING،2017.
71. Majid Ghaffari, Ali A. Orouji, Mojtaba Valinataj،Triple tooth AlGaN/GaN HEMT on SiC substrate A novel structure for high-power applications،JOURNAL OF THE KOREAN PHYSICAL SOCIETY،2017.
72. Maryam Mohajer, Mojtaba Valinataj،A Novel Reduced-Precision Fault-Tolerant Floating-Point Multiplier،International Journal of Modern Education and Computer Science،2017.
73. Mojtaba Valinataj،Novel parity-preserving reversible logic array multipliers،JOURNAL OF SUPERCOMPUTING،2017.
74. Majid Ghaffari, Ali A. Orouji, Mojtaba Valinataj،Triple tooth AlGaN/GaN HEMT on SiC substrate A novel structure for high-power applications،JOURNAL OF THE KOREAN PHYSICAL SOCIETY،2017.
75. Maryam Mohajer, Mojtaba Valinataj،A Novel Reduced-Precision Fault-Tolerant Floating-Point Multiplier،International Journal of Modern Education and Computer Science،2017.
76. Mojtaba Valinataj،Novel parity-preserving reversible logic array multipliers،JOURNAL OF SUPERCOMPUTING،2017.
77. Majid Ghaffari, Ali A. Orouji, Mojtaba Valinataj،Triple tooth AlGaN/GaN HEMT on SiC substrate A novel structure for high-power applications،JOURNAL OF THE KOREAN PHYSICAL SOCIETY،2017.
78. Maryam Mohajer, Mojtaba Valinataj،A Novel Reduced-Precision Fault-Tolerant Floating-Point Multiplier،International Journal of Modern Education and Computer Science،2017.
79. Mojtaba Valinataj،Novel parity-preserving reversible logic array multipliers،JOURNAL OF SUPERCOMPUTING،2017.
80. Majid Ghaffari, Ali A. Orouji, Mojtaba Valinataj،Triple tooth AlGaN/GaN HEMT on SiC substrate A novel structure for high-power applications،JOURNAL OF THE KOREAN PHYSICAL SOCIETY،2017.
81. Maryam Mohajer, Mojtaba Valinataj،A Novel Reduced-Precision Fault-Tolerant Floating-Point Multiplier،International Journal of Modern Education and Computer Science،2017.
82. Mojtaba Valinataj،Novel parity-preserving reversible logic array multipliers،JOURNAL OF SUPERCOMPUTING،2017.
83. Majid Ghaffari, Ali A. Orouji, Mojtaba Valinataj،Triple tooth AlGaN/GaN HEMT on SiC substrate A novel structure for high-power applications،JOURNAL OF THE KOREAN PHYSICAL SOCIETY،2017.
84. Maryam Mohajer, Mojtaba Valinataj،A Novel Reduced-Precision Fault-Tolerant Floating-Point Multiplier،International Journal of Modern Education and Computer Science،2017.
85. Mojtaba Valinataj, , Hamid Jazayeri،Novel low-cost and fault-tolerant reversible logic adders،COMPUTERS and ELECTRICAL ENGINEERING،2016.
86. Mojtaba Valinataj, Mostafa Shahiri Tabarestani،A low-cost fault-tolerant and high-performance router architecture for on-chip networks،MICROPROCESSORS AND MICROSYSTEMS،2016.
87. Mojtaba Valinataj, , Hamid Jazayeri،Novel low-cost and fault-tolerant reversible logic adders،COMPUTERS and ELECTRICAL ENGINEERING،2016.
88. Mojtaba Valinataj, Mostafa Shahiri Tabarestani،A low-cost fault-tolerant and high-performance router architecture for on-chip networks،MICROPROCESSORS AND MICROSYSTEMS،2016.
89. Mojtaba Valinataj, , Hamid Jazayeri،Novel low-cost and fault-tolerant reversible logic adders،COMPUTERS and ELECTRICAL ENGINEERING،2016.
90. Mojtaba Valinataj, Mostafa Shahiri Tabarestani،A low-cost fault-tolerant and high-performance router architecture for on-chip networks،MICROPROCESSORS AND MICROSYSTEMS،2016.
91. Mojtaba Valinataj, , Hamid Jazayeri،Novel low-cost and fault-tolerant reversible logic adders،COMPUTERS and ELECTRICAL ENGINEERING،2016.
92. Mojtaba Valinataj, Mostafa Shahiri Tabarestani،A low-cost fault-tolerant and high-performance router architecture for on-chip networks،MICROPROCESSORS AND MICROSYSTEMS،2016.
93. Mojtaba Valinataj, , Hamid Jazayeri،Novel low-cost and fault-tolerant reversible logic adders،COMPUTERS and ELECTRICAL ENGINEERING،2016.
94. Mojtaba Valinataj, Mostafa Shahiri Tabarestani،A low-cost fault-tolerant and high-performance router architecture for on-chip networks،MICROPROCESSORS AND MICROSYSTEMS،2016.
95. Mojtaba Valinataj, , Hamid Jazayeri،Novel low-cost and fault-tolerant reversible logic adders،COMPUTERS and ELECTRICAL ENGINEERING،2016.
96. Mojtaba Valinataj, Mostafa Shahiri Tabarestani،A low-cost fault-tolerant and high-performance router architecture for on-chip networks،MICROPROCESSORS AND MICROSYSTEMS،2016.
97. Mojtaba Valinataj،Fault-tolerant carry look-ahead adder architectures robust to multiple simultaneous errors،MICROELECTRONICS RELIABILITY،2015.
98. Mojtaba Valinataj،Fault-tolerant carry look-ahead adder architectures robust to multiple simultaneous errors،MICROELECTRONICS RELIABILITY،2015.
99. Mojtaba Valinataj،Fault-tolerant carry look-ahead adder architectures robust to multiple simultaneous errors،MICROELECTRONICS RELIABILITY،2015.
100. Mojtaba Valinataj،Fault-tolerant carry look-ahead adder architectures robust to multiple simultaneous errors،MICROELECTRONICS RELIABILITY،2015.
101. Mojtaba Valinataj،Fault-tolerant carry look-ahead adder architectures robust to multiple simultaneous errors،MICROELECTRONICS RELIABILITY،2015.
102. Mojtaba Valinataj،Fault-tolerant carry look-ahead adder architectures robust to multiple simultaneous errors،MICROELECTRONICS RELIABILITY،2015.
103. Mojtaba Valinataj،A novel self-checking carry lookahead adder with multiple error detection/correction،MICROPROCESSORS AND MICROSYSTEMS،2014.
104. Mojtaba Valinataj،Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures،International Journal of Engineering, Transactions A: Basics،2014.
105. Mojtaba Valinataj،A novel self-checking carry lookahead adder with multiple error detection/correction،MICROPROCESSORS AND MICROSYSTEMS،2014.
106. Mojtaba Valinataj،Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures،International Journal of Engineering, Transactions A: Basics،2014.
107. Mojtaba Valinataj،A novel self-checking carry lookahead adder with multiple error detection/correction،MICROPROCESSORS AND MICROSYSTEMS،2014.
108. Mojtaba Valinataj،Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures،International Journal of Engineering, Transactions A: Basics،2014.
109. Mojtaba Valinataj،A novel self-checking carry lookahead adder with multiple error detection/correction،MICROPROCESSORS AND MICROSYSTEMS،2014.
110. Mojtaba Valinataj،Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures،International Journal of Engineering, Transactions A: Basics،2014.
111. Mojtaba Valinataj،A novel self-checking carry lookahead adder with multiple error detection/correction،MICROPROCESSORS AND MICROSYSTEMS،2014.
112. Mojtaba Valinataj،Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures،International Journal of Engineering, Transactions A: Basics،2014.
113. Mojtaba Valinataj،A novel self-checking carry lookahead adder with multiple error detection/correction،MICROPROCESSORS AND MICROSYSTEMS،2014.
114. Mojtaba Valinataj،Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures،International Journal of Engineering, Transactions A: Basics،2014.
115. Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen،A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip،AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS،2011.
116. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Fault-aware and reconfigurable routing algorithms for networks-on-chip،IETE JOURNAL OF RESEARCH،2011.
117. Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen،A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip،AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS،2011.
118. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Fault-aware and reconfigurable routing algorithms for networks-on-chip،IETE JOURNAL OF RESEARCH،2011.
119. Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen،A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip،AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS،2011.
120. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Fault-aware and reconfigurable routing algorithms for networks-on-chip،IETE JOURNAL OF RESEARCH،2011.
121. Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen،A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip،AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS،2011.
122. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Fault-aware and reconfigurable routing algorithms for networks-on-chip،IETE JOURNAL OF RESEARCH،2011.
123. Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen،A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip،AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS،2011.
124. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Fault-aware and reconfigurable routing algorithms for networks-on-chip،IETE JOURNAL OF RESEARCH،2011.
125. Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen،A reconfigurable and adaptive routing method for fault-tolerant mesh-based networks-on-chip،AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS،2011.
126. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Fault-aware and reconfigurable routing algorithms for networks-on-chip،IETE JOURNAL OF RESEARCH،2011.
127. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Reliability assessment of networks-on-chip based on analytical models،Journal of Zhejiang University-SCIENCE A،2009.
128. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Reliability assessment of networks-on-chip based on analytical models،Journal of Zhejiang University-SCIENCE A،2009.
129. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Reliability assessment of networks-on-chip based on analytical models،Journal of Zhejiang University-SCIENCE A،2009.
130. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Reliability assessment of networks-on-chip based on analytical models،Journal of Zhejiang University-SCIENCE A،2009.
131. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Reliability assessment of networks-on-chip based on analytical models،Journal of Zhejiang University-SCIENCE A،2009.
132. Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari،Reliability assessment of networks-on-chip based on analytical models،Journal of Zhejiang University-SCIENCE A،2009.

Mojtaba Valinataj

Associate Professor Mojtaba Valinataj

Mojtaba Valinataj

Subjects Taught

Executions And Scientific Activities

Papers in Journals